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Package Design

  • Overview
  • Concurrent Design Flow

ASAT DesignPackage design has become a critical element in semiconductor manufacturing, impacting device performance as well as board-level and system integration. ASAT's design operations provide state-of-the-art packaging design tools and highly qualified design engineers required to support all types of lead frame and ball grid array packages (flip chip, fine pitch, multi-chip, stacked-die, cavity-down, etc.). These capabilities are backed by ASAT’s worldwide design centers, which offer satellite design support for immediate personalized package design needs.

ASAT’s quick package design feasibility and turnaround cycle times significantly reduce product development and time to market for our customers. In addition, ASAT offers flexible design rules and substrate technologies that can be used to tailor device and application requirements. ASAT assesses the manufacturability of each product by tracking the design process flow from beginning to end. In addition, our design engineers review customer designs with the assembly/development engineering groups, ensuring a reliable and manufacturable product that meets each customer’s requirements.

ASAT design engineers take into account the following electrical requirements:

  • Single-End Impedance Matching
  • Differential Impedance Matching
  • Match Differential Pair Length
  • Pair to Pair Cross Talk (Same Layer)
  • Control Delay Time
  • Layer to Layer Cross Talk
  • Via Discontinuities
  • Plane Segmentation

 

ASAT Design Centers

  • Hong Kong
  • Dongguan, China
  • Milpitas, CA

 

ASAT Design Tools

  • Unified Package Designer from Sigrity
  • Allegro Package Designer from Cadence
  • CAM350™ from DownStream Technologies
  • AutoCAD® 2008 from Autodesk®
  • DocGen from Artwork Conversion Software
  • BondGen from Artwork Conversion Software
  • Wire Bond/Tagger Package Design from Artworkl Conversion Software

ASAT Design Input and Output Formats

  • Gerber
  • AutoCAD (.dxf or .dwg formats)
  • GDSII
  • .upd, .mcm, .brd, .NA2
  • Pin to pad netlist (.txt or .xls formats)

 

Design Flow