SiP
System-in-Package

With its core competencies in advanced package design, assembly and testing, ASAT is qualified to meet the electronics industry's demand for higher levels of integration, cost effectiveness and better electrical performance. Using state-of-the-art design tools and electrical simulation, single or multiple chips, passive components and discrete devices can be designed into a standard or custom package. These elements can be electrically interconnected to the substrate in both chip form (wire bond or flip chip options available) and pre-tested assembled monolithic packages. Various leaded, array and leadless package formats are supported.

Click here for ASAT's data sheet on SiP.

Advantages
  • Electrical performance improvement
  • Real estate savings on printed board
  • Shorter electrical paths
  • System integration through high packaging density
  • Faster time to market
Stacked Die

With the industry's increasing demand for lower costs, smaller products and additional features, ASAT introduced a new line of packaging solutions utilizing its core competencies in package design and assembly processes. Using state-of-the-art wafer backgrinding, handling, die attach and wirebond assembly processes, two or more dies can be stacked within a single package. Several of the die stacks can also be assembled and electrically interconnected within the package. Both leaded and array packages are currently available with this technology.
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Leaded

 

Ball Grid Array

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