LPCC™ / QFN
Leadless Plastic Chip Carrier

The LPCC patented plastic package was developed by ASAT in 1998, introducing a "leadless" concept into ASAT's expanding portfolio. The LPCC package is a superior choice for high-speed applications where thermal and electrical performance is paramount and space constraints are unavoidable. For thermal solutions, this package has the ability to mount the die attach pad directly to the board for heat dissipation.

Click here to download ASAT's data sheet on LPCC.

Typical Cross-section

US Pat. 6,229,200
US Pat. 6,242,281
US Pat. 6,294,100
US Pat. 6,545,347
US Pat. 6,585,905
US Pat. 6,940,154

 

 

 

 

 

 

 

 

Advantages
  • Green and lead-free options available
  • Lowest stress at solder joint
    compared to CSP & Flex packages
  • Saw singulation technique provides larger die pads for better thermal performance
  • Very low inductance for high-speed
    applications
  • Ten day design cycle time including
    lead frame
  • Immune to die shrink
  • Die pad mounting to motherboard provides for excellent thermal performance

Also available in:

JEDEC:

Typical Applications
  • ASICs, DSP, ASSP
  • High-speed networks
  • Personal digital assistants
  • RF applications
  • Telecommunications

 

Bonding Diagrams and MODs

Size
I/O
Pitch
DAP Size (mils)
No Ground Ring
With Ground Ring
MOD
3x3
12
0.65
75x75
16
0.50
4x4
16
0.65
114x114
24
0.50
5X5
20
0.65
154X154
24
0.65
28
0.50
32
0.50
6X6
28
0.65
193X193
36
0.50
40
0.50
7x7
44
0.50
232x232
48
0.50
8X8
44
0.65
272x272
56
0.50
9x9
64
0.50
311x311

* Please contact your local sales representative or FAE for assistance.